· New Report Analyzes ...
· CirTran CEO Sees 'No ...
· Analysis and ...
· Merix Corporation ...
· Mitsubishi Electric Co...
· Mentor Graphics CEO to...
· LPKF Introduces New ...
· Goodbye Wires
· Texas Instruments Sees...
· CCID Consulting: China...
 
   
 
 
PCBVIA
Kunshan Branch Steven Li
TEL:0512-55177566
EMAIL:steven@pcbvia.com
Kunshan Branch Bill
TEL:0512-55177566
EMAIL:bill@pcbvia.com
 
         
SI/PI
Board Simulation
High Speed Design
A/D Mixed
EMC Design
EMC Test
PCB Manufacture
FPC Manufacture
Sample Assembly
Mass Production
· IPC's Upcoming Events ...
· Agilent Technologies ...
· 44th Design Automation...
· Cadence Speeds RF ...
· Jim McLeish of DfR ...
· Oki Electric Cable ...
· Millennia Design Inc. ...
· Mentor Graphics CEO to...
· IPC Intl Conference on...
· Next Generation of ...
 
 
  ·Maximum designed layers: 34 layers ·Maximum PIN count:42565
  ·Minimum BGA PIN pitch:0.5mm ·TI DLP-RAMBUS RDRAM
  ·10G differential pair signal ·DDR&DDRII SDRAM600Mbps
  ·Minimum line width: 2.0 MIL ·All kind of Power Design(Switch Power Supply)

·The Related Chipset:Xilinx VirtexII、VirxtexPro、INTEL2800、2400、1200、MOTOROLA MPC8260、MPC860、MPC750、BROADCOM 5464、5691、1125、1250 TI DM642、C6415、C5561、Marvell、Altera PC104、PCI、CPCI、PCI-X、PCIE、ATCA、High speed back board and so on.

   
Home | PCB Assembly | Location | About Us | Contact Us | EMC | SI | Term
 
PCBVIA - No.111,East ChaoYang Road,Kunshan City,JiangSu,China
Post Code: 215300 Tel: +86 0512 55177566 Fax: +86 0512 55176707 E-mail: steven@pcbvia.com
 
This Web Page is Developed By: Hewei Web (www.kunshanweb.com)